The present invention relates to inspecting the quality of wafers each in the form of a thin cylindrical wafer of a semiconductor material such as silicon that undergoes a certain number of transformations (polishing, oxidation, implantation, transfer, depositing layers of materials, etc.) to form a support from which large numbers of components may be produced (for example, cells of integrated circuits or discrete devices).
Throughout the industrial process for producing such a wafer, its quality as regards the thickness, structure, number of defects, optical or electrical characteristics, etc. must be inspected regularly. To this end, methods exist for measuring magnitudes that can be used to carry out whole wafer mapping (electrical characteristics, thickness of a thin film, composition, etc). This mapping is carried out from measurement points, the number of which is necessarily limited by the acceptable duration of such inspections during the fabrication process. Thus, it is important to have methods which allow a minimum number of measurement points to be determined, and especially to determine a judicious positioning for them to represent the characteristics of the wafer to be measured in as faithful and efficient a manner as possible.
As an example, when inspecting the uniformity of the thickness of the thin silicon layer of a SOI (silicon-on-insulator) wafer obtained by the SMART-CUT® technique, the thickness of the thin layer after polishing (on the order of 20 nm to 1.5 μm) must take several factors into account:
Firstly, a high uniformity of thickness is desired over the whole wafer (on the order of several atomic planes), which requires great accuracy in the measurement. During the wafer fabrication process, polishing equipment is used. Because the layers in question are very thin, it will be understood that it is important to monitor and carefully adjust the operation of such equipment.
Further, the periphery of a SOI wafer has a zone termed an exclusion zone (up to 5 mm at the wafer circumference) where the measurements are not representative. This exclusion zone is actually larger than the unused peripheral zone of the wafer (for example zone not transferred after bonding typically 1 mm to 2 mm) to avoid measurement artifacts induced by the proximity of the wafer edge.
Certain measurements may be carried out “on-line”, i.e. directly on the production line, while others are carried out “off-line”, i.e. with measurement means that cannot be integrated into the production line, such as electrical measurements that can only be made off-line, for example.
Regarding “on-line” measurements, the polishing equipment includes metrological means (for example a reflectometer to measure thickness) with a capacity as regards the number of measurement points that is typically limited to about one hundred points per wafer, the measurement period being of the order of one second per point. Methods used to carry out wafer mapping are constituted by a distribution either along a diameter of the wafer, or in a circle, or by defining Cartesian coordinates for the measurement points. Those methods for positioning the measurement points are thus not adapted to measuring SOI wafers as the methods cannot, for example, permit a denser distribution of points close to the exclusion zone or suppression of the points in that zone.
Regarding “off-line” measurements, reflectometry equipment (for example measuring instrument such as “ACUMAP®” from ADE Semiconductor) produces a map that requires a large number of measurement points to obtain a faithful map of the uniformity of thickness of the thin layer: of the order of 7500 points for ACUMAP® equipment. Those measurements take a long time (about 2 to 3 minutes per wafer) and are thus expensive. For that reason, that type of inspection is generally carried out by sampling (i.e., off-line inspection, for example by analyzing one wafer per batch), which is not satisfactory. Further, off-line production inspection by sampling does not allow immediate corrective action to be carried out, which causes a loss of product during production.
This problem, discussed for the sake of clarification with the particular example of measuring thickness, is also applicable to measurements of electrical characteristics and more generally to any wafer characterization (thickness by ellipsometry, stress by Raman measurements, etc), especially of SOI wafers, where rapid and faithful mapping of a physical magnitude is required. A solution to this problem is needed, and is now provided by the present invention.